2 * Linux PCI Utilities -- List All PCI Devices
4 * Copyright (c) 1997--2002 Martin Mares <mj@ucw.cz>
6 * Can be freely distributed and used under the terms of the GNU GPL.
19 static int verbose; /* Show detailed information */
20 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
21 static int show_hex; /* Show contents of config space as hexadecimal numbers */
22 static struct pci_filter filter; /* Device filter */
23 static int show_tree; /* Show bus tree */
24 static int machine_readable; /* Generate machine-readable output */
25 static int map_mode; /* Bus mapping mode enabled */
27 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
29 static char help_msg[] = "\
30 Usage: lspci [<switches>]\n\
33 -n\t\tShow numeric ID's\n\
34 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
35 -x\t\tShow hex-dump of the standard portion of config space\n\
36 -xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n\
37 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
38 -d [<vendor>]:[<device>]\tShow only selected devices\n\
39 -t\t\tShow bus tree\n\
40 -m\t\tProduce machine-readable output\n\
41 -i <file>\tUse specified ID database instead of %s\n\
42 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
46 /* Communication with libpci */
48 static struct pci_access *pacc;
50 /* Format strings used for IRQ numbers and memory addresses */
53 #define IRQ_FORMAT "%08x"
55 #define IRQ_FORMAT "%d"
58 #ifdef HAVE_64BIT_ADDRESS
59 #ifdef HAVE_LONG_ADDRESS
60 #define ADDR_FORMAT "%016Lx"
62 #define ADDR_FORMAT "%016lx"
65 #define ADDR_FORMAT "%08lx"
69 #define IO_FORMAT "%016Lx"
70 #elif defined(HAVE_LONG_ADDRESS)
71 #define IO_FORMAT "%04Lx"
73 #define IO_FORMAT "%04lx"
77 * If we aren't being compiled by GCC, use malloc() instead of alloca().
78 * This increases our memory footprint, but only slightly since we don't
86 /* Our view of the PCI bus */
91 unsigned int config_cnt;
95 static struct device *first_dev;
97 static struct device *
98 scan_device(struct pci_dev *p)
100 int how_much = (show_hex > 2) ? 256 : 64;
103 if (!pci_filter_match(&filter, p))
105 d = xmalloc(sizeof(struct device));
106 bzero(d, sizeof(*d));
108 if (!pci_read_block(p, 0, d->config, how_much))
109 die("Unable to read %d bytes of configuration space.", how_much);
110 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
112 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
113 if (!pci_read_block(p, 64, d->config+64, 64))
114 die("Unable to read cardbus bridge extension data.");
117 d->config_cnt = how_much;
118 pci_setup_cache(p, d->config, d->config_cnt);
119 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
130 for(p=pacc->devices; p; p=p->next)
131 if (d = scan_device(p))
141 static int is_root = -1;
144 is_root = !geteuid();
149 config_fetch(struct device *d, unsigned int pos, unsigned int len)
151 if (pos + len < d->config_cnt)
153 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
155 return pci_read_block(d->dev, pos, d->config + pos, len);
158 /* Config space accesses */
161 get_conf_byte(struct device *d, unsigned int pos)
163 return d->config[pos];
167 get_conf_word(struct device *d, unsigned int pos)
169 return d->config[pos] | (d->config[pos+1] << 8);
173 get_conf_long(struct device *d, unsigned int pos)
175 return d->config[pos] |
176 (d->config[pos+1] << 8) |
177 (d->config[pos+2] << 16) |
178 (d->config[pos+3] << 24);
184 compare_them(const void *A, const void *B)
186 const struct pci_dev *a = (*(const struct device **)A)->dev;
187 const struct pci_dev *b = (*(const struct device **)B)->dev;
197 if (a->func < b->func)
199 if (a->func > b->func)
207 struct device **index, **h, **last_dev;
212 for(d=first_dev; d; d=d->next)
214 h = index = alloca(sizeof(struct device *) * cnt);
215 for(d=first_dev; d; d=d->next)
217 qsort(index, cnt, sizeof(struct device *), compare_them);
218 last_dev = &first_dev;
223 last_dev = &(*h)->next;
231 #define FLAG(x,y) ((x & y) ? '+' : '-')
234 show_terse(struct device *d)
237 struct pci_dev *p = d->dev;
238 byte classbuf[128], devbuf[128];
240 printf("%02x:%02x.%x %s: %s",
244 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
246 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
247 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
248 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
249 p->vendor_id, p->device_id, 0, 0));
250 if (c = get_conf_byte(d, PCI_REVISION_ID))
251 printf(" (rev %02x)", c);
255 c = get_conf_byte(d, PCI_CLASS_PROG);
256 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
258 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
261 printf(" (prog-if %02x", c);
271 show_size(pciaddr_t x)
277 printf("%d", (int) x);
278 else if (x < 1048576)
279 printf("%dK", (int)(x / 1024));
280 else if (x < 0x80000000)
281 printf("%dM", (int)(x / 1048576));
283 printf(ADDR_FORMAT, x);
288 show_bases(struct device *d, int cnt)
290 struct pci_dev *p = d->dev;
291 word cmd = get_conf_word(d, PCI_COMMAND);
296 pciaddr_t pos = p->base_addr[i];
297 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
298 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
299 if (flg == 0xffffffff)
301 if (!pos && !flg && !len)
304 printf("\tRegion %d: ", i);
307 if (pos && !flg) /* Reported by the OS, but not by the device */
309 printf("[virtual] ");
312 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
314 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
315 printf("I/O ports at ");
317 printf(IO_FORMAT, a);
318 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
321 printf("<unassigned>");
322 if (!(cmd & PCI_COMMAND_IO))
323 printf(" [disabled]");
327 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
328 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
332 printf("Memory at ");
333 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
337 printf("<invalid-64bit-slot>");
343 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
347 printf("%08x" ADDR_FORMAT, z, a);
349 printf("<unassigned>");
357 printf(ADDR_FORMAT, a);
359 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
361 printf(" (%s, %sprefetchable)",
362 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
363 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
365 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
366 if (!(cmd & PCI_COMMAND_MEMORY))
367 printf(" [disabled]");
375 show_pm(struct device *d, int where, int cap)
378 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
380 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
383 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
384 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
385 FLAG(cap, PCI_PM_CAP_DSI),
386 FLAG(cap, PCI_PM_CAP_D1),
387 FLAG(cap, PCI_PM_CAP_D2),
388 pm_aux_current[(cap >> 6) & 7],
389 FLAG(cap, PCI_PM_CAP_PME_D0),
390 FLAG(cap, PCI_PM_CAP_PME_D1),
391 FLAG(cap, PCI_PM_CAP_PME_D2),
392 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
393 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
394 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
395 t = get_conf_word(d, where + PCI_PM_CTRL);
396 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
397 t & PCI_PM_CTRL_STATE_MASK,
398 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
399 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
400 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
401 FLAG(t, PCI_PM_CTRL_PME_STATUS));
402 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
404 printf("\t\tBridge: PM%c B3%c\n",
405 FLAG(t, PCI_PM_BPCC_ENABLE),
406 FLAG(~t, PCI_PM_PPB_B2_B3));
410 format_agp_rate(int rate, char *buf, int agp3)
421 *c++ = '0' + (1 << (i + 2*agp3));
426 strcpy(buf, "<none>");
430 show_agp(struct device *d, int where, int cap)
437 ver = (cap >> 4) & 0x0f;
439 printf("AGP version %x.%x\n", ver, rev);
442 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
443 t = get_conf_long(d, where + PCI_AGP_STATUS);
444 if (ver >= 3 && (t & PCI_AGP_STATUS_AGP3))
446 format_agp_rate(t & 7, rate, agp3);
447 printf("\t\tStatus: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s\n",
448 ((t & PCI_AGP_STATUS_RQ_MASK) >> 24U) + 1,
449 FLAG(t, PCI_AGP_STATUS_ISOCH),
450 ((t & PCI_AGP_STATUS_ARQSZ_MASK) >> 13),
451 ((t & PCI_AGP_STATUS_CAL_MASK) >> 10),
452 FLAG(t, PCI_AGP_STATUS_SBA),
453 FLAG(t, PCI_AGP_STATUS_ITA_COH),
454 FLAG(t, PCI_AGP_STATUS_GART64),
455 FLAG(t, PCI_AGP_STATUS_HTRANS),
456 FLAG(t, PCI_AGP_STATUS_64BIT),
457 FLAG(t, PCI_AGP_STATUS_FW),
458 FLAG(t, PCI_AGP_STATUS_AGP3),
460 t = get_conf_long(d, where + PCI_AGP_COMMAND);
461 format_agp_rate(t & 7, rate, agp3);
462 printf("\t\tCommand: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s\n",
463 ((t & PCI_AGP_COMMAND_RQ_MASK) >> 24U) + 1,
464 ((t & PCI_AGP_COMMAND_ARQSZ_MASK) >> 13),
465 ((t & PCI_AGP_COMMAND_CAL_MASK) >> 10),
466 FLAG(t, PCI_AGP_COMMAND_SBA),
467 FLAG(t, PCI_AGP_COMMAND_AGP),
468 FLAG(t, PCI_AGP_COMMAND_GART64),
469 FLAG(t, PCI_AGP_COMMAND_64BIT),
470 FLAG(t, PCI_AGP_COMMAND_FW),
475 show_pcix_nobridge(struct device *d, int where)
477 u16 command = get_conf_word(d, where + PCI_PCIX_COMMAND);
478 u32 status = get_conf_long(d, where + PCI_PCIX_STATUS);
479 printf("PCI-X non-bridge device.\n");
482 printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n",
483 FLAG(command, PCI_PCIX_COMMAND_DPERE),
484 FLAG(command, PCI_PCIX_COMMAND_ERO),
485 ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U),
486 ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U));
487 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c",
488 ((status >> 8) & 0xffU), // bus
489 ((status >> 3) & 0x1fU), // dev
490 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
491 FLAG(status, PCI_PCIX_STATUS_64BIT),
492 FLAG(status, PCI_PCIX_STATUS_133MHZ),
493 FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
494 FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
495 ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
496 ((status >> 21) & 3U),
497 ((status >> 23) & 7U),
498 ((status >> 26) & 7U),
499 FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS));
503 show_pcix_bridge(struct device *d, int where)
506 u32 status, upstcr, downstcr;
507 printf("PCI-X bridge device.\n");
510 secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS);
511 printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n",
512 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT),
513 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ),
514 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED),
515 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
516 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
517 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
518 ((secstatus >> 6) & 7));
519 status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
520 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n",
521 ((status >> 8) & 0xff), // bus
522 ((status >> 3) & 0x1f), // dev
523 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
524 FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
525 FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
526 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED),
527 FLAG(status, PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC),
528 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN),
529 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED));
530 upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL);
531 printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n",
532 (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
533 (upstcr >> 16) & 0xffff);
534 downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL);
535 printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n",
536 (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
537 (downstcr >> 16) & 0xffff);
541 show_pcix(struct device *d, int where)
543 switch (d->dev->hdrtype)
545 case PCI_HEADER_TYPE_NORMAL:
546 show_pcix_nobridge(d, where);
548 case PCI_HEADER_TYPE_BRIDGE:
549 show_pcix_bridge(d, where);
555 show_rom(struct device *d)
557 struct pci_dev *p = d->dev;
558 pciaddr_t rom = p->rom_base_addr;
559 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
563 printf("\tExpansion ROM at ");
564 if (rom & PCI_ROM_ADDRESS_MASK)
565 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
567 printf("<unassigned>");
568 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
569 printf(" [disabled]");
575 show_msi(struct device *d, int where, int cap)
581 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
582 FLAG(cap, PCI_MSI_FLAGS_64BIT),
583 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
584 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
585 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
588 is64 = cap & PCI_MSI_FLAGS_64BIT;
589 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
590 printf("\t\tAddress: ");
593 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
594 w = get_conf_word(d, where + PCI_MSI_DATA_64);
598 w = get_conf_word(d, where + PCI_MSI_DATA_32);
599 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
600 printf("%08x Data: %04x\n", t, w);
606 int esr = cap & 0xff;
609 printf("Slot ID: %d slots, First%c, chassis %02x\n",
610 esr & PCI_SID_ESR_NSLOTS,
611 FLAG(esr, PCI_SID_ESR_FIC),
616 show_caps(struct device *d)
618 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
620 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
624 printf("\tCapabilities: ");
625 if (!config_fetch(d, where, 4))
627 puts("<available only to root>");
630 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
631 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
632 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
633 printf("[%02x] ", where);
636 printf("<chain broken>\n");
642 show_pm(d, where, cap);
645 show_agp(d, where, cap);
648 printf("Vital Product Data\n");
650 case PCI_CAP_ID_SLOTID:
654 show_msi(d, where, cap);
656 case PCI_CAP_ID_PCIX:
660 printf("#%02x [%04x]\n", id, cap);
668 show_htype0(struct device *d)
676 show_htype1(struct device *d)
678 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
679 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
680 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
681 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
682 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
683 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
684 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
685 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
686 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
687 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
688 int verb = verbose > 2;
691 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
692 get_conf_byte(d, PCI_PRIMARY_BUS),
693 get_conf_byte(d, PCI_SECONDARY_BUS),
694 get_conf_byte(d, PCI_SUBORDINATE_BUS),
695 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
697 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
698 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
699 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
702 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
703 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
704 if (io_type == PCI_IO_RANGE_TYPE_32)
706 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
707 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
709 if (io_base <= io_limit || verb)
710 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
713 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
715 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
718 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
719 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
720 if (mem_base <= mem_limit || verb)
721 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
724 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
725 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
726 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
729 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
730 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
731 if (pref_base <= pref_limit || verb)
733 if (pref_type == PCI_PREF_RANGE_TYPE_32)
734 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
736 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
737 get_conf_long(d, PCI_PREF_BASE_UPPER32),
739 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
744 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
745 printf("\tSecondary status: SERR\n");
750 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
751 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
752 FLAG(brc, PCI_BRIDGE_CTL_SERR),
753 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
754 FLAG(brc, PCI_BRIDGE_CTL_VGA),
755 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
756 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
757 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
763 show_htype2(struct device *d)
766 word cmd = get_conf_word(d, PCI_COMMAND);
767 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
768 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
769 int verb = verbose > 2;
772 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
773 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
774 get_conf_byte(d, PCI_CB_CARD_BUS),
775 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
776 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
780 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
781 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
782 if (limit > base || verb)
783 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
784 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
785 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
790 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
791 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
792 if (!(base & PCI_IO_RANGE_TYPE_32))
797 base &= PCI_CB_IO_RANGE_MASK;
798 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
799 if (base <= limit || verb)
800 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
801 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
804 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
805 printf("\tSecondary status: SERR\n");
807 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
808 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
809 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
810 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
811 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
812 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
813 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
814 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
815 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
817 printf("\t16-bit legacy interface ports at %04x\n", exca);
821 show_verbose(struct device *d)
823 struct pci_dev *p = d->dev;
824 word status = get_conf_word(d, PCI_STATUS);
825 word cmd = get_conf_word(d, PCI_COMMAND);
826 word class = get_conf_word(d, PCI_CLASS_DEVICE);
827 byte bist = get_conf_byte(d, PCI_BIST);
828 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
829 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
830 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
831 byte max_lat, min_gnt;
832 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
833 unsigned int irq = p->irq;
834 word subsys_v, subsys_d;
841 case PCI_HEADER_TYPE_NORMAL:
842 if (class == PCI_CLASS_BRIDGE_PCI)
843 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
844 max_lat = get_conf_byte(d, PCI_MAX_LAT);
845 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
846 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
847 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
849 case PCI_HEADER_TYPE_BRIDGE:
850 if (class != PCI_CLASS_BRIDGE_PCI)
851 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
852 irq = int_pin = min_gnt = max_lat = 0;
853 subsys_v = subsys_d = 0;
855 case PCI_HEADER_TYPE_CARDBUS:
856 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
857 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
858 min_gnt = max_lat = 0;
859 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
860 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
863 printf("\t!!! Unknown header type %02x\n", htype);
867 if (subsys_v && subsys_v != 0xffff)
868 printf("\tSubsystem: %s\n",
869 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
870 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
871 p->vendor_id, p->device_id, subsys_v, subsys_d));
875 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
876 FLAG(cmd, PCI_COMMAND_IO),
877 FLAG(cmd, PCI_COMMAND_MEMORY),
878 FLAG(cmd, PCI_COMMAND_MASTER),
879 FLAG(cmd, PCI_COMMAND_SPECIAL),
880 FLAG(cmd, PCI_COMMAND_INVALIDATE),
881 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
882 FLAG(cmd, PCI_COMMAND_PARITY),
883 FLAG(cmd, PCI_COMMAND_WAIT),
884 FLAG(cmd, PCI_COMMAND_SERR),
885 FLAG(cmd, PCI_COMMAND_FAST_BACK));
886 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
887 FLAG(status, PCI_STATUS_CAP_LIST),
888 FLAG(status, PCI_STATUS_66MHZ),
889 FLAG(status, PCI_STATUS_UDF),
890 FLAG(status, PCI_STATUS_FAST_BACK),
891 FLAG(status, PCI_STATUS_PARITY),
892 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
893 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
894 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
895 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
896 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
897 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
898 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
899 FLAG(status, PCI_STATUS_DETECTED_PARITY));
900 if (cmd & PCI_COMMAND_MASTER)
902 printf("\tLatency: %d", latency);
903 if (min_gnt || max_lat)
907 printf("%dns min", min_gnt*250);
908 if (min_gnt && max_lat)
911 printf("%dns max", max_lat*250);
915 printf(", cache line size %02x", cache_line);
919 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
920 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
925 if (cmd & PCI_COMMAND_MASTER)
926 printf("bus master, ");
927 if (cmd & PCI_COMMAND_VGA_PALETTE)
928 printf("VGA palette snoop, ");
929 if (cmd & PCI_COMMAND_WAIT)
930 printf("stepping, ");
931 if (cmd & PCI_COMMAND_FAST_BACK)
932 printf("fast Back2Back, ");
933 if (status & PCI_STATUS_66MHZ)
935 if (status & PCI_STATUS_UDF)
936 printf("user-definable features, ");
938 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
939 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
940 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
941 if (cmd & PCI_COMMAND_MASTER)
942 printf(", latency %d", latency);
944 printf(", IRQ " IRQ_FORMAT, irq);
948 if (bist & PCI_BIST_CAPABLE)
950 if (bist & PCI_BIST_START)
951 printf("\tBIST is running\n");
953 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
958 case PCI_HEADER_TYPE_NORMAL:
961 case PCI_HEADER_TYPE_BRIDGE:
964 case PCI_HEADER_TYPE_CARDBUS:
971 show_hex_dump(struct device *d)
975 for(i=0; i<d->config_cnt; i++)
979 printf(" %02x", get_conf_byte(d, i));
986 show_machine(struct device *d)
988 struct pci_dev *p = d->dev;
990 word sv_id=0, sd_id=0;
991 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
993 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
995 case PCI_HEADER_TYPE_NORMAL:
996 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
997 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
999 case PCI_HEADER_TYPE_CARDBUS:
1000 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
1001 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
1007 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
1008 printf("Class:\t%s\n",
1009 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
1010 printf("Vendor:\t%s\n",
1011 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
1012 printf("Device:\t%s\n",
1013 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
1014 if (sv_id && sv_id != 0xffff)
1016 printf("SVendor:\t%s\n",
1017 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
1018 printf("SDevice:\t%s\n",
1019 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1021 if (c = get_conf_byte(d, PCI_REVISION_ID))
1022 printf("Rev:\t%02x\n", c);
1023 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1024 printf("ProgIf:\t%02x\n", c);
1028 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
1029 printf("\"%s\" \"%s\" \"%s\"",
1030 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
1031 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
1032 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
1033 p->vendor_id, p->device_id, 0, 0),
1034 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
1035 p->vendor_id, p->device_id, 0, 0));
1036 if (c = get_conf_byte(d, PCI_REVISION_ID))
1037 printf(" -r%02x", c);
1038 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1039 printf(" -p%02x", c);
1040 if (sv_id && sv_id != 0xffff)
1041 printf(" \"%s\" \"%s\"",
1042 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
1043 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1045 printf(" \"\" \"\"");
1051 show_device(struct device *d)
1053 if (machine_readable)
1061 if (verbose || show_hex)
1070 for(d=first_dev; d; d=d->next)
1077 struct bridge *chain; /* Single-linked list of bridges */
1078 struct bridge *next, *child; /* Tree of bridges */
1079 struct bus *first_bus; /* List of busses connected to this bridge */
1080 unsigned int primary, secondary, subordinate; /* Bus numbers */
1081 struct device *br_dev;
1085 unsigned int number;
1086 struct bus *sibling;
1087 struct device *first_dev, **last_dev;
1090 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
1093 find_bus(struct bridge *b, unsigned int n)
1097 for(bus=b->first_bus; bus; bus=bus->sibling)
1098 if (bus->number == n)
1104 new_bus(struct bridge *b, unsigned int n)
1106 struct bus *bus = xmalloc(sizeof(struct bus));
1108 bus = xmalloc(sizeof(struct bus));
1110 bus->sibling = b->first_bus;
1111 bus->first_dev = NULL;
1112 bus->last_dev = &bus->first_dev;
1118 insert_dev(struct device *d, struct bridge *b)
1120 struct pci_dev *p = d->dev;
1123 if (! (bus = find_bus(b, p->bus)))
1126 for(c=b->child; c; c=c->next)
1127 if (c->secondary <= p->bus && p->bus <= c->subordinate)
1132 bus = new_bus(b, p->bus);
1134 /* Simple insertion at the end _does_ guarantee the correct order as the
1135 * original device list was sorted by (bus, devfn) lexicographically
1136 * and all devices on the new list have the same bus number.
1139 bus->last_dev = &d->next;
1146 struct device *d, *d2;
1147 struct bridge **last_br, *b;
1149 /* Build list of bridges */
1151 last_br = &host_bridge.chain;
1152 for(d=first_dev; d; d=d->next)
1154 word class = get_conf_word(d, PCI_CLASS_DEVICE);
1155 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1156 if (class == PCI_CLASS_BRIDGE_PCI &&
1157 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
1159 b = xmalloc(sizeof(struct bridge));
1160 if (ht == PCI_HEADER_TYPE_BRIDGE)
1162 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1163 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1164 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1168 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1169 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1170 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1173 last_br = &b->chain;
1174 b->next = b->child = NULL;
1175 b->first_bus = NULL;
1181 /* Create a bridge tree */
1183 for(b=&host_bridge; b; b=b->chain)
1185 struct bridge *c, *best;
1187 for(c=&host_bridge; c; c=c->chain)
1188 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1189 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1193 b->next = best->child;
1198 /* Insert secondary bus for each bridge */
1200 for(b=&host_bridge; b; b=b->chain)
1201 if (!find_bus(b, b->secondary))
1202 new_bus(b, b->secondary);
1204 /* Create bus structs and link devices */
1206 for(d=first_dev; d;)
1209 insert_dev(d, &host_bridge);
1215 print_it(byte *line, byte *p)
1219 fputs(line, stdout);
1220 for(p=line; *p; p++)
1221 if (*p == '+' || *p == '|')
1227 static void show_tree_bridge(struct bridge *, byte *, byte *);
1230 show_tree_dev(struct device *d, byte *line, byte *p)
1232 struct pci_dev *q = d->dev;
1236 p += sprintf(p, "%02x.%x", q->dev, q->func);
1237 for(b=&host_bridge; b; b=b->chain)
1240 if (b->secondary == b->subordinate)
1241 p += sprintf(p, "-[%02x]-", b->secondary);
1243 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1244 show_tree_bridge(b, line, p);
1248 p += sprintf(p, " %s",
1249 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1250 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1251 q->vendor_id, q->device_id, 0, 0));
1256 show_tree_bus(struct bus *b, byte *line, byte *p)
1260 else if (!b->first_dev->next)
1264 show_tree_dev(b->first_dev, line, p);
1268 struct device *d = b->first_dev;
1273 show_tree_dev(d, line, p+2);
1278 show_tree_dev(d, line, p+2);
1283 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1286 if (!b->first_bus->sibling)
1288 if (b == &host_bridge)
1289 p += sprintf(p, "[%02x]-", b->first_bus->number);
1290 show_tree_bus(b->first_bus, line, p);
1294 struct bus *u = b->first_bus;
1299 k = p + sprintf(p, "+-[%02x]-", u->number);
1300 show_tree_bus(u, line, k);
1303 k = p + sprintf(p, "\\-[%02x]-", u->number);
1304 show_tree_bus(u, line, k);
1314 show_tree_bridge(&host_bridge, line, line);
1317 /* Bus mapping mode */
1320 struct bus_bridge *next;
1321 byte this, dev, func, first, last, bug;
1327 struct bus_bridge *bridges, *via;
1330 static struct bus_info *bus_info;
1333 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1335 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1336 struct pci_dev *p = d->dev;
1338 b->next = bi->bridges;
1340 b->this = get_conf_byte(d, np);
1343 b->first = get_conf_byte(d, ns);
1344 b->last = get_conf_byte(d, nl);
1345 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1346 p->bus, p->dev, p->func, b->this, b->first, b->last);
1347 if (b->this != p->bus)
1348 printf("!!! Bridge points to invalid primary bus.\n");
1349 if (b->first > b->last)
1351 printf("!!! Bridge points to invalid bus range.\n");
1360 int verbose = pacc->debugging;
1361 struct bus_info *bi = bus_info + bus;
1365 printf("Mapping bus %02x\n", bus);
1366 for(dev = 0; dev < 32; dev++)
1367 if (filter.slot < 0 || filter.slot == dev)
1370 for(func = 0; func < func_limit; func++)
1371 if (filter.func < 0 || filter.func == func)
1373 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1374 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1375 if (vendor && vendor != 0xffff)
1377 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1380 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1382 if (d = scan_device(p))
1385 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1387 case PCI_HEADER_TYPE_BRIDGE:
1388 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1390 case PCI_HEADER_TYPE_CARDBUS:
1391 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1397 printf("But it was filtered out.\n");
1405 do_map_bridges(int bus, int min, int max)
1407 struct bus_info *bi = bus_info + bus;
1408 struct bus_bridge *b;
1411 for(b=bi->bridges; b; b=b->next)
1413 if (bus_info[b->first].guestbook)
1415 else if (b->first < min || b->last > max)
1419 bus_info[b->first].via = b;
1420 do_map_bridges(b->first, b->first, b->last);
1430 printf("\nSummary of buses:\n\n");
1431 for(i=0; i<256; i++)
1432 if (bus_info[i].exists && !bus_info[i].guestbook)
1433 do_map_bridges(i, 0, 255);
1434 for(i=0; i<256; i++)
1436 struct bus_info *bi = bus_info + i;
1437 struct bus_bridge *b = bi->via;
1441 printf("%02x: ", i);
1443 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1445 printf("Primary host bus\n");
1447 printf("Secondary host bus (?)\n");
1449 for(b=bi->bridges; b; b=b->next)
1451 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1455 printf(" <overlap bug>");
1458 printf(" <crossing bug>");
1469 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1470 pacc->method == PCI_ACCESS_DUMP)
1471 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1472 else if (!check_root())
1473 die("Only root can map the bus.");
1474 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1475 bzero(bus_info, sizeof(struct bus_info) * 256);
1476 if (filter.bus >= 0)
1477 do_map_bus(filter.bus);
1481 for(bus=0; bus<256; bus++)
1490 main(int argc, char **argv)
1495 if (argc == 2 && !strcmp(argv[1], "--version"))
1497 puts("lspci version " PCIUTILS_VERSION);
1503 pci_filter_init(pacc, &filter);
1505 while ((i = getopt(argc, argv, options)) != -1)
1509 pacc->numeric_ids = 1;
1515 pacc->buscentric = 1;
1516 buscentric_view = 1;
1519 if (msg = pci_filter_parse_slot(&filter, optarg))
1523 if (msg = pci_filter_parse_id(&filter, optarg))
1533 pacc->id_file_name = optarg;
1542 if (parse_generic_option(i, pacc, optarg))
1545 fprintf(stderr, help_msg, pacc->id_file_name);