2 * $Id: lspci.c,v 1.43 2002/12/26 20:24:50 mj Exp $
4 * Linux PCI Utilities -- List All PCI Devices
6 * Copyright (c) 1997--2002 Martin Mares <mj@ucw.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
21 static int verbose; /* Show detailed information */
22 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23 static int show_hex; /* Show contents of config space as hexadecimal numbers */
24 static struct pci_filter filter; /* Device filter */
25 static int show_tree; /* Show bus tree */
26 static int machine_readable; /* Generate machine-readable output */
27 static int map_mode; /* Bus mapping mode enabled */
29 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
31 static char help_msg[] = "\
32 Usage: lspci [<switches>]\n\
35 -n\t\tShow numeric ID's\n\
36 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37 -x\t\tShow hex-dump of the standard portion of config space\n\
38 -xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n\
39 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
40 -d [<vendor>]:[<device>]\tShow only selected devices\n\
41 -t\t\tShow bus tree\n\
42 -m\t\tProduce machine-readable output\n\
43 -i <file>\tUse specified ID database instead of %s\n\
44 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
48 /* Communication with libpci */
50 static struct pci_access *pacc;
52 /* Format strings used for IRQ numbers and memory addresses */
55 #define IRQ_FORMAT "%08x"
57 #define IRQ_FORMAT "%d"
60 #ifdef HAVE_64BIT_ADDRESS
61 #ifdef HAVE_LONG_ADDRESS
62 #define ADDR_FORMAT "%016Lx"
64 #define ADDR_FORMAT "%016lx"
67 #define ADDR_FORMAT "%08lx"
71 #define IO_FORMAT "%016Lx"
72 #elif defined(HAVE_LONG_ADDRESS)
73 #define IO_FORMAT "%04Lx"
75 #define IO_FORMAT "%04lx"
79 * If we aren't being compiled by GCC, use malloc() instead of alloca().
80 * This increases our memory footprint, but only slightly since we don't
88 /* Our view of the PCI bus */
93 unsigned int config_cnt;
97 static struct device *first_dev;
99 static struct device *
100 scan_device(struct pci_dev *p)
102 int how_much = (show_hex > 2) ? 256 : 64;
105 if (!pci_filter_match(&filter, p))
107 d = xmalloc(sizeof(struct device));
108 bzero(d, sizeof(*d));
110 if (!pci_read_block(p, 0, d->config, how_much))
111 die("Unable to read %d bytes of configuration space.", how_much);
112 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
114 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
115 if (!pci_read_block(p, 64, d->config+64, 64))
116 die("Unable to read cardbus bridge extension data.");
119 d->config_cnt = how_much;
120 pci_setup_cache(p, d->config, d->config_cnt);
121 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
132 for(p=pacc->devices; p; p=p->next)
133 if (d = scan_device(p))
143 static int is_root = -1;
146 is_root = !geteuid();
151 config_fetch(struct device *d, unsigned int pos, unsigned int len)
153 if (pos + len < d->config_cnt)
155 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
157 return pci_read_block(d->dev, pos, d->config + pos, len);
160 /* Config space accesses */
163 get_conf_byte(struct device *d, unsigned int pos)
165 return d->config[pos];
169 get_conf_word(struct device *d, unsigned int pos)
171 return d->config[pos] | (d->config[pos+1] << 8);
175 get_conf_long(struct device *d, unsigned int pos)
177 return d->config[pos] |
178 (d->config[pos+1] << 8) |
179 (d->config[pos+2] << 16) |
180 (d->config[pos+3] << 24);
186 compare_them(const void *A, const void *B)
188 const struct pci_dev *a = (*(const struct device **)A)->dev;
189 const struct pci_dev *b = (*(const struct device **)B)->dev;
199 if (a->func < b->func)
201 if (a->func > b->func)
209 struct device **index, **h, **last_dev;
214 for(d=first_dev; d; d=d->next)
216 h = index = alloca(sizeof(struct device *) * cnt);
217 for(d=first_dev; d; d=d->next)
219 qsort(index, cnt, sizeof(struct device *), compare_them);
220 last_dev = &first_dev;
225 last_dev = &(*h)->next;
233 #define FLAG(x,y) ((x & y) ? '+' : '-')
236 show_terse(struct device *d)
239 struct pci_dev *p = d->dev;
240 byte classbuf[128], devbuf[128];
242 printf("%02x:%02x.%x %s: %s",
246 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
248 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
249 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
250 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
251 p->vendor_id, p->device_id, 0, 0));
252 if (c = get_conf_byte(d, PCI_REVISION_ID))
253 printf(" (rev %02x)", c);
257 c = get_conf_byte(d, PCI_CLASS_PROG);
258 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
260 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
263 printf(" (prog-if %02x", c);
273 show_size(pciaddr_t x)
279 printf("%d", (int) x);
280 else if (x < 1048576)
281 printf("%dK", (int)(x / 1024));
282 else if (x < 0x80000000)
283 printf("%dM", (int)(x / 1048576));
285 printf(ADDR_FORMAT, x);
290 show_bases(struct device *d, int cnt)
292 struct pci_dev *p = d->dev;
293 word cmd = get_conf_word(d, PCI_COMMAND);
298 pciaddr_t pos = p->base_addr[i];
299 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
300 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
301 if (flg == 0xffffffff)
303 if (!pos && !flg && !len)
306 printf("\tRegion %d: ", i);
309 if (pos && !flg) /* Reported by the OS, but not by the device */
311 printf("[virtual] ");
314 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
316 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
317 printf("I/O ports at ");
319 printf(IO_FORMAT, a);
320 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
323 printf("<unassigned>");
324 if (!(cmd & PCI_COMMAND_IO))
325 printf(" [disabled]");
329 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
330 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
334 printf("Memory at ");
335 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
339 printf("<invalid-64bit-slot>");
345 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
349 printf("%08x" ADDR_FORMAT, z, a);
351 printf("<unassigned>");
359 printf(ADDR_FORMAT, a);
361 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
363 printf(" (%s, %sprefetchable)",
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
365 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
366 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
367 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
368 if (!(cmd & PCI_COMMAND_MEMORY))
369 printf(" [disabled]");
377 show_pm(struct device *d, int where, int cap)
380 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
382 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
385 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
386 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
387 FLAG(cap, PCI_PM_CAP_DSI),
388 FLAG(cap, PCI_PM_CAP_D1),
389 FLAG(cap, PCI_PM_CAP_D2),
390 pm_aux_current[(cap >> 6) & 7],
391 FLAG(cap, PCI_PM_CAP_PME_D0),
392 FLAG(cap, PCI_PM_CAP_PME_D1),
393 FLAG(cap, PCI_PM_CAP_PME_D2),
394 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
395 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
396 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
397 t = get_conf_word(d, where + PCI_PM_CTRL);
398 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
399 t & PCI_PM_CTRL_STATE_MASK,
400 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
401 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
402 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
403 FLAG(t, PCI_PM_CTRL_PME_STATUS));
404 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
406 printf("\t\tBridge: PM%c B3%c\n",
407 FLAG(t, PCI_PM_BPCC_ENABLE),
408 FLAG(~t, PCI_PM_PPB_B2_B3));
412 format_agp_rate(int rate, char *buf, int agp3)
423 *c++ = '0' + (1 << (i + 2*agp3));
428 strcpy(buf, "<none>");
432 show_agp(struct device *d, int where, int cap)
439 ver = (cap >> 4) & 0x0f;
441 printf("AGP version %x.%x\n", ver, rev);
444 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
445 t = get_conf_long(d, where + PCI_AGP_STATUS);
446 if (ver >= 3 && (t & PCI_AGP_STATUS_AGP3))
448 format_agp_rate(t & 7, rate, agp3);
449 printf("\t\tStatus: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s\n",
450 ((t & PCI_AGP_STATUS_RQ_MASK) >> 24U) + 1,
451 FLAG(t, PCI_AGP_STATUS_ISOCH),
452 ((t & PCI_AGP_STATUS_ARQSZ_MASK) >> 13),
453 ((t & PCI_AGP_STATUS_CAL_MASK) >> 10),
454 FLAG(t, PCI_AGP_STATUS_SBA),
455 FLAG(t, PCI_AGP_STATUS_ITA_COH),
456 FLAG(t, PCI_AGP_STATUS_GART64),
457 FLAG(t, PCI_AGP_STATUS_HTRANS),
458 FLAG(t, PCI_AGP_STATUS_64BIT),
459 FLAG(t, PCI_AGP_STATUS_FW),
460 FLAG(t, PCI_AGP_STATUS_AGP3),
462 t = get_conf_long(d, where + PCI_AGP_COMMAND);
463 format_agp_rate(t & 7, rate, agp3);
464 printf("\t\tCommand: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s\n",
465 ((t & PCI_AGP_COMMAND_RQ_MASK) >> 24U) + 1,
466 ((t & PCI_AGP_COMMAND_ARQSZ_MASK) >> 13),
467 ((t & PCI_AGP_COMMAND_CAL_MASK) >> 10),
468 FLAG(t, PCI_AGP_COMMAND_SBA),
469 FLAG(t, PCI_AGP_COMMAND_AGP),
470 FLAG(t, PCI_AGP_COMMAND_GART64),
471 FLAG(t, PCI_AGP_COMMAND_64BIT),
472 FLAG(t, PCI_AGP_COMMAND_FW),
477 show_pcix_nobridge(struct device *d, int where)
479 u16 command = get_conf_word(d, where + PCI_PCIX_COMMAND);
480 u32 status = get_conf_long(d, where + PCI_PCIX_STATUS);
481 printf("PCI-X non-bridge device.\n");
484 printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n",
485 FLAG(command, PCI_PCIX_COMMAND_DPERE),
486 FLAG(command, PCI_PCIX_COMMAND_ERO),
487 ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U),
488 ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U));
489 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c",
490 ((status >> 8) & 0xffU), // bus
491 ((status >> 3) & 0x1fU), // dev
492 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
493 FLAG(status, PCI_PCIX_STATUS_64BIT),
494 FLAG(status, PCI_PCIX_STATUS_133MHZ),
495 FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
496 FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
497 ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
498 ((status >> 21) & 3U),
499 ((status >> 23) & 7U),
500 ((status >> 26) & 7U),
501 FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS));
505 show_pcix_bridge(struct device *d, int where)
508 u32 status, upstcr, downstcr;
509 printf("PCI-X bridge device.\n");
512 secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS);
513 printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n",
514 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT),
515 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ),
516 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED),
517 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
518 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
519 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
520 ((secstatus >> 6) & 7));
521 status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
522 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n",
523 ((status >> 8) & 0xff), // bus
524 ((status >> 3) & 0x1f), // dev
525 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
526 FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
527 FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
528 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED),
529 FLAG(status, PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC),
530 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN),
531 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED));
532 upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL);
533 printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n",
534 (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
535 (upstcr >> 16) & 0xffff);
536 downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL);
537 printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n",
538 (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
539 (downstcr >> 16) & 0xffff);
543 show_pcix(struct device *d, int where)
545 switch (d->dev->hdrtype)
547 case PCI_HEADER_TYPE_NORMAL:
548 show_pcix_nobridge(d, where);
550 case PCI_HEADER_TYPE_BRIDGE:
551 show_pcix_bridge(d, where);
557 show_rom(struct device *d)
559 struct pci_dev *p = d->dev;
560 pciaddr_t rom = p->rom_base_addr;
561 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
565 printf("\tExpansion ROM at ");
566 if (rom & PCI_ROM_ADDRESS_MASK)
567 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
569 printf("<unassigned>");
570 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
571 printf(" [disabled]");
577 show_msi(struct device *d, int where, int cap)
583 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
584 FLAG(cap, PCI_MSI_FLAGS_64BIT),
585 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
586 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
587 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
590 is64 = cap & PCI_MSI_FLAGS_64BIT;
591 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
592 printf("\t\tAddress: ");
595 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
596 w = get_conf_word(d, where + PCI_MSI_DATA_64);
600 w = get_conf_word(d, where + PCI_MSI_DATA_32);
601 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
602 printf("%08x Data: %04x\n", t, w);
608 int esr = cap & 0xff;
611 printf("Slot ID: %d slots, First%c, chassis %02x\n",
612 esr & PCI_SID_ESR_NSLOTS,
613 FLAG(esr, PCI_SID_ESR_FIC),
618 show_caps(struct device *d)
620 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
622 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
626 printf("\tCapabilities: ");
627 if (!config_fetch(d, where, 4))
629 puts("<available only to root>");
632 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
633 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
634 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
635 printf("[%02x] ", where);
638 printf("<chain broken>\n");
644 show_pm(d, where, cap);
647 show_agp(d, where, cap);
650 printf("Vital Product Data\n");
652 case PCI_CAP_ID_SLOTID:
656 show_msi(d, where, cap);
658 case PCI_CAP_ID_PCIX:
662 printf("#%02x [%04x]\n", id, cap);
670 show_htype0(struct device *d)
678 show_htype1(struct device *d)
680 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
681 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
682 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
683 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
684 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
685 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
686 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
687 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
688 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
689 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
690 int verb = verbose > 2;
693 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
694 get_conf_byte(d, PCI_PRIMARY_BUS),
695 get_conf_byte(d, PCI_SECONDARY_BUS),
696 get_conf_byte(d, PCI_SUBORDINATE_BUS),
697 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
699 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
700 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
701 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
704 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
705 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
706 if (io_type == PCI_IO_RANGE_TYPE_32)
708 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
709 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
711 if (io_base <= io_limit || verb)
712 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
715 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
717 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
720 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
721 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
722 if (mem_base <= mem_limit || verb)
723 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
726 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
727 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
728 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
731 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
732 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
733 if (pref_base <= pref_limit || verb)
735 if (pref_type == PCI_PREF_RANGE_TYPE_32)
736 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
738 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
739 get_conf_long(d, PCI_PREF_BASE_UPPER32),
741 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
746 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
747 printf("\tSecondary status: SERR\n");
752 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
753 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
754 FLAG(brc, PCI_BRIDGE_CTL_SERR),
755 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
756 FLAG(brc, PCI_BRIDGE_CTL_VGA),
757 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
758 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
759 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
765 show_htype2(struct device *d)
768 word cmd = get_conf_word(d, PCI_COMMAND);
769 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
770 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
771 int verb = verbose > 2;
774 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
775 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
776 get_conf_byte(d, PCI_CB_CARD_BUS),
777 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
778 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
782 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
783 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
784 if (limit > base || verb)
785 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
786 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
787 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
792 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
793 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
794 if (!(base & PCI_IO_RANGE_TYPE_32))
799 base &= PCI_CB_IO_RANGE_MASK;
800 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
801 if (base <= limit || verb)
802 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
803 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
806 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
807 printf("\tSecondary status: SERR\n");
809 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
810 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
811 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
812 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
813 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
814 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
815 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
816 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
817 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
819 printf("\t16-bit legacy interface ports at %04x\n", exca);
823 show_verbose(struct device *d)
825 struct pci_dev *p = d->dev;
826 word status = get_conf_word(d, PCI_STATUS);
827 word cmd = get_conf_word(d, PCI_COMMAND);
828 word class = get_conf_word(d, PCI_CLASS_DEVICE);
829 byte bist = get_conf_byte(d, PCI_BIST);
830 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
831 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
832 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
833 byte max_lat, min_gnt;
834 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
835 unsigned int irq = p->irq;
836 word subsys_v, subsys_d;
843 case PCI_HEADER_TYPE_NORMAL:
844 if (class == PCI_CLASS_BRIDGE_PCI)
845 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
846 max_lat = get_conf_byte(d, PCI_MAX_LAT);
847 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
848 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
849 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
851 case PCI_HEADER_TYPE_BRIDGE:
852 if (class != PCI_CLASS_BRIDGE_PCI)
853 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
854 irq = int_pin = min_gnt = max_lat = 0;
855 subsys_v = subsys_d = 0;
857 case PCI_HEADER_TYPE_CARDBUS:
858 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
859 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
860 min_gnt = max_lat = 0;
861 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
862 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
865 printf("\t!!! Unknown header type %02x\n", htype);
869 if (subsys_v && subsys_v != 0xffff)
870 printf("\tSubsystem: %s\n",
871 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
872 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
873 p->vendor_id, p->device_id, subsys_v, subsys_d));
877 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
878 FLAG(cmd, PCI_COMMAND_IO),
879 FLAG(cmd, PCI_COMMAND_MEMORY),
880 FLAG(cmd, PCI_COMMAND_MASTER),
881 FLAG(cmd, PCI_COMMAND_SPECIAL),
882 FLAG(cmd, PCI_COMMAND_INVALIDATE),
883 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
884 FLAG(cmd, PCI_COMMAND_PARITY),
885 FLAG(cmd, PCI_COMMAND_WAIT),
886 FLAG(cmd, PCI_COMMAND_SERR),
887 FLAG(cmd, PCI_COMMAND_FAST_BACK));
888 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
889 FLAG(status, PCI_STATUS_CAP_LIST),
890 FLAG(status, PCI_STATUS_66MHZ),
891 FLAG(status, PCI_STATUS_UDF),
892 FLAG(status, PCI_STATUS_FAST_BACK),
893 FLAG(status, PCI_STATUS_PARITY),
894 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
895 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
896 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
897 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
898 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
899 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
900 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
901 FLAG(status, PCI_STATUS_DETECTED_PARITY));
902 if (cmd & PCI_COMMAND_MASTER)
904 printf("\tLatency: %d", latency);
905 if (min_gnt || max_lat)
909 printf("%dns min", min_gnt*250);
910 if (min_gnt && max_lat)
913 printf("%dns max", max_lat*250);
917 printf(", cache line size %02x", cache_line);
921 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
922 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
927 if (cmd & PCI_COMMAND_MASTER)
928 printf("bus master, ");
929 if (cmd & PCI_COMMAND_VGA_PALETTE)
930 printf("VGA palette snoop, ");
931 if (cmd & PCI_COMMAND_WAIT)
932 printf("stepping, ");
933 if (cmd & PCI_COMMAND_FAST_BACK)
934 printf("fast Back2Back, ");
935 if (status & PCI_STATUS_66MHZ)
937 if (status & PCI_STATUS_UDF)
938 printf("user-definable features, ");
940 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
941 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
942 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
943 if (cmd & PCI_COMMAND_MASTER)
944 printf(", latency %d", latency);
946 printf(", IRQ " IRQ_FORMAT, irq);
950 if (bist & PCI_BIST_CAPABLE)
952 if (bist & PCI_BIST_START)
953 printf("\tBIST is running\n");
955 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
960 case PCI_HEADER_TYPE_NORMAL:
963 case PCI_HEADER_TYPE_BRIDGE:
966 case PCI_HEADER_TYPE_CARDBUS:
973 show_hex_dump(struct device *d)
977 for(i=0; i<d->config_cnt; i++)
981 printf(" %02x", get_conf_byte(d, i));
988 show_machine(struct device *d)
990 struct pci_dev *p = d->dev;
992 word sv_id=0, sd_id=0;
993 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
995 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
997 case PCI_HEADER_TYPE_NORMAL:
998 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
999 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
1001 case PCI_HEADER_TYPE_CARDBUS:
1002 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
1003 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
1009 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
1010 printf("Class:\t%s\n",
1011 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
1012 printf("Vendor:\t%s\n",
1013 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
1014 printf("Device:\t%s\n",
1015 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
1016 if (sv_id && sv_id != 0xffff)
1018 printf("SVendor:\t%s\n",
1019 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
1020 printf("SDevice:\t%s\n",
1021 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1023 if (c = get_conf_byte(d, PCI_REVISION_ID))
1024 printf("Rev:\t%02x\n", c);
1025 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1026 printf("ProgIf:\t%02x\n", c);
1030 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
1031 printf("\"%s\" \"%s\" \"%s\"",
1032 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
1033 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
1034 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
1035 p->vendor_id, p->device_id, 0, 0),
1036 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
1037 p->vendor_id, p->device_id, 0, 0));
1038 if (c = get_conf_byte(d, PCI_REVISION_ID))
1039 printf(" -r%02x", c);
1040 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1041 printf(" -p%02x", c);
1042 if (sv_id && sv_id != 0xffff)
1043 printf(" \"%s\" \"%s\"",
1044 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
1045 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1047 printf(" \"\" \"\"");
1053 show_device(struct device *d)
1055 if (machine_readable)
1063 if (verbose || show_hex)
1072 for(d=first_dev; d; d=d->next)
1079 struct bridge *chain; /* Single-linked list of bridges */
1080 struct bridge *next, *child; /* Tree of bridges */
1081 struct bus *first_bus; /* List of busses connected to this bridge */
1082 unsigned int primary, secondary, subordinate; /* Bus numbers */
1083 struct device *br_dev;
1087 unsigned int number;
1088 struct bus *sibling;
1089 struct device *first_dev, **last_dev;
1092 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
1095 find_bus(struct bridge *b, unsigned int n)
1099 for(bus=b->first_bus; bus; bus=bus->sibling)
1100 if (bus->number == n)
1106 new_bus(struct bridge *b, unsigned int n)
1108 struct bus *bus = xmalloc(sizeof(struct bus));
1110 bus = xmalloc(sizeof(struct bus));
1112 bus->sibling = b->first_bus;
1113 bus->first_dev = NULL;
1114 bus->last_dev = &bus->first_dev;
1120 insert_dev(struct device *d, struct bridge *b)
1122 struct pci_dev *p = d->dev;
1125 if (! (bus = find_bus(b, p->bus)))
1128 for(c=b->child; c; c=c->next)
1129 if (c->secondary <= p->bus && p->bus <= c->subordinate)
1134 bus = new_bus(b, p->bus);
1136 /* Simple insertion at the end _does_ guarantee the correct order as the
1137 * original device list was sorted by (bus, devfn) lexicographically
1138 * and all devices on the new list have the same bus number.
1141 bus->last_dev = &d->next;
1148 struct device *d, *d2;
1149 struct bridge **last_br, *b;
1151 /* Build list of bridges */
1153 last_br = &host_bridge.chain;
1154 for(d=first_dev; d; d=d->next)
1156 word class = get_conf_word(d, PCI_CLASS_DEVICE);
1157 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1158 if (class == PCI_CLASS_BRIDGE_PCI &&
1159 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
1161 b = xmalloc(sizeof(struct bridge));
1162 if (ht == PCI_HEADER_TYPE_BRIDGE)
1164 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1165 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1166 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1170 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1171 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1172 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1175 last_br = &b->chain;
1176 b->next = b->child = NULL;
1177 b->first_bus = NULL;
1183 /* Create a bridge tree */
1185 for(b=&host_bridge; b; b=b->chain)
1187 struct bridge *c, *best;
1189 for(c=&host_bridge; c; c=c->chain)
1190 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1191 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1195 b->next = best->child;
1200 /* Insert secondary bus for each bridge */
1202 for(b=&host_bridge; b; b=b->chain)
1203 if (!find_bus(b, b->secondary))
1204 new_bus(b, b->secondary);
1206 /* Create bus structs and link devices */
1208 for(d=first_dev; d;)
1211 insert_dev(d, &host_bridge);
1217 print_it(byte *line, byte *p)
1221 fputs(line, stdout);
1222 for(p=line; *p; p++)
1223 if (*p == '+' || *p == '|')
1229 static void show_tree_bridge(struct bridge *, byte *, byte *);
1232 show_tree_dev(struct device *d, byte *line, byte *p)
1234 struct pci_dev *q = d->dev;
1238 p += sprintf(p, "%02x.%x", q->dev, q->func);
1239 for(b=&host_bridge; b; b=b->chain)
1242 if (b->secondary == b->subordinate)
1243 p += sprintf(p, "-[%02x]-", b->secondary);
1245 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1246 show_tree_bridge(b, line, p);
1250 p += sprintf(p, " %s",
1251 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1252 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1253 q->vendor_id, q->device_id, 0, 0));
1258 show_tree_bus(struct bus *b, byte *line, byte *p)
1262 else if (!b->first_dev->next)
1266 show_tree_dev(b->first_dev, line, p);
1270 struct device *d = b->first_dev;
1275 show_tree_dev(d, line, p+2);
1280 show_tree_dev(d, line, p+2);
1285 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1288 if (!b->first_bus->sibling)
1290 if (b == &host_bridge)
1291 p += sprintf(p, "[%02x]-", b->first_bus->number);
1292 show_tree_bus(b->first_bus, line, p);
1296 struct bus *u = b->first_bus;
1301 k = p + sprintf(p, "+-[%02x]-", u->number);
1302 show_tree_bus(u, line, k);
1305 k = p + sprintf(p, "\\-[%02x]-", u->number);
1306 show_tree_bus(u, line, k);
1316 show_tree_bridge(&host_bridge, line, line);
1319 /* Bus mapping mode */
1322 struct bus_bridge *next;
1323 byte this, dev, func, first, last, bug;
1329 struct bus_bridge *bridges, *via;
1332 static struct bus_info *bus_info;
1335 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1337 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1338 struct pci_dev *p = d->dev;
1340 b->next = bi->bridges;
1342 b->this = get_conf_byte(d, np);
1345 b->first = get_conf_byte(d, ns);
1346 b->last = get_conf_byte(d, nl);
1347 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1348 p->bus, p->dev, p->func, b->this, b->first, b->last);
1349 if (b->this != p->bus)
1350 printf("!!! Bridge points to invalid primary bus.\n");
1351 if (b->first > b->last)
1353 printf("!!! Bridge points to invalid bus range.\n");
1362 int verbose = pacc->debugging;
1363 struct bus_info *bi = bus_info + bus;
1367 printf("Mapping bus %02x\n", bus);
1368 for(dev = 0; dev < 32; dev++)
1369 if (filter.slot < 0 || filter.slot == dev)
1372 for(func = 0; func < func_limit; func++)
1373 if (filter.func < 0 || filter.func == func)
1375 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1376 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1377 if (vendor && vendor != 0xffff)
1379 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1382 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1384 if (d = scan_device(p))
1387 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1389 case PCI_HEADER_TYPE_BRIDGE:
1390 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1392 case PCI_HEADER_TYPE_CARDBUS:
1393 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1399 printf("But it was filtered out.\n");
1407 do_map_bridges(int bus, int min, int max)
1409 struct bus_info *bi = bus_info + bus;
1410 struct bus_bridge *b;
1413 for(b=bi->bridges; b; b=b->next)
1415 if (bus_info[b->first].guestbook)
1417 else if (b->first < min || b->last > max)
1421 bus_info[b->first].via = b;
1422 do_map_bridges(b->first, b->first, b->last);
1432 printf("\nSummary of buses:\n\n");
1433 for(i=0; i<256; i++)
1434 if (bus_info[i].exists && !bus_info[i].guestbook)
1435 do_map_bridges(i, 0, 255);
1436 for(i=0; i<256; i++)
1438 struct bus_info *bi = bus_info + i;
1439 struct bus_bridge *b = bi->via;
1443 printf("%02x: ", i);
1445 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1447 printf("Primary host bus\n");
1449 printf("Secondary host bus (?)\n");
1451 for(b=bi->bridges; b; b=b->next)
1453 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1457 printf(" <overlap bug>");
1460 printf(" <crossing bug>");
1471 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1472 pacc->method == PCI_ACCESS_DUMP)
1473 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1474 else if (!check_root())
1475 die("Only root can map the bus.");
1476 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1477 bzero(bus_info, sizeof(struct bus_info) * 256);
1478 if (filter.bus >= 0)
1479 do_map_bus(filter.bus);
1483 for(bus=0; bus<256; bus++)
1492 main(int argc, char **argv)
1497 if (argc == 2 && !strcmp(argv[1], "--version"))
1499 puts("lspci version " PCIUTILS_VERSION);
1505 pci_filter_init(pacc, &filter);
1507 while ((i = getopt(argc, argv, options)) != -1)
1511 pacc->numeric_ids = 1;
1517 pacc->buscentric = 1;
1518 buscentric_view = 1;
1521 if (msg = pci_filter_parse_slot(&filter, optarg))
1525 if (msg = pci_filter_parse_id(&filter, optarg))
1535 pacc->id_file_name = optarg;
1544 if (parse_generic_option(i, pacc, optarg))
1547 fprintf(stderr, help_msg, pacc->id_file_name);