2 * $Id: lspci.c,v 1.38 2000/05/20 14:36:02 mj Exp $
4 * Linux PCI Utilities -- List All PCI Devices
6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
21 static int verbose; /* Show detailed information */
22 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23 static int show_hex; /* Show contents of config space as hexadecimal numbers */
24 static struct pci_filter filter; /* Device filter */
25 static int show_tree; /* Show bus tree */
26 static int machine_readable; /* Generate machine-readable output */
27 static int map_mode; /* Bus mapping mode enabled */
29 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
31 static char help_msg[] = "\
32 Usage: lspci [<switches>]\n\
35 -n\t\tShow numeric ID's\n\
36 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37 -x\t\tShow hex-dump of config space\n\
38 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39 -d [<vendor>]:[<device>]\tShow only selected devices\n\
40 -t\t\tShow bus tree\n\
41 -m\t\tProduce machine-readable output\n\
42 -i <file>\tUse specified ID database instead of %s\n\
43 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
47 /* Communication with libpci */
49 static struct pci_access *pacc;
51 /* Format strings used for IRQ numbers and memory addresses */
54 #define IRQ_FORMAT "%08x"
56 #define IRQ_FORMAT "%d"
59 #ifdef HAVE_64BIT_ADDRESS
60 #ifdef HAVE_LONG_ADDRESS
61 #define ADDR_FORMAT "%016Lx"
63 #define ADDR_FORMAT "%016lx"
66 #define ADDR_FORMAT "%08lx"
70 #define IO_FORMAT "%016Lx"
71 #elif defined(HAVE_LONG_ADDRESS)
72 #define IO_FORMAT "%04Lx"
74 #define IO_FORMAT "%04lx"
78 * If we aren't being compiled by GCC, use malloc() instead of alloca().
79 * This increases our memory footprint, but only slightly since we don't
87 /* Our view of the PCI bus */
92 unsigned int config_cnt;
96 static struct device *first_dev;
98 static struct device *
99 scan_device(struct pci_dev *p)
101 int how_much = (show_hex > 2) ? 256 : 64;
104 if (!pci_filter_match(&filter, p))
106 d = xmalloc(sizeof(struct device));
107 bzero(d, sizeof(*d));
109 if (!pci_read_block(p, 0, d->config, how_much))
110 die("Unable to read %d bytes of configuration space.", how_much);
111 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
113 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
114 if (!pci_read_block(p, 64, d->config+64, 64))
115 die("Unable to read cardbus bridge extension data.");
118 d->config_cnt = how_much;
119 pci_setup_cache(p, d->config, d->config_cnt);
120 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
131 for(p=pacc->devices; p; p=p->next)
132 if (d = scan_device(p))
142 static int is_root = -1;
145 is_root = !geteuid();
150 config_fetch(struct device *d, unsigned int pos, unsigned int len)
152 if (pos + len < d->config_cnt)
154 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
156 return pci_read_block(d->dev, pos, d->config + pos, len);
159 /* Config space accesses */
162 get_conf_byte(struct device *d, unsigned int pos)
164 return d->config[pos];
168 get_conf_word(struct device *d, unsigned int pos)
170 return d->config[pos] | (d->config[pos+1] << 8);
174 get_conf_long(struct device *d, unsigned int pos)
176 return d->config[pos] |
177 (d->config[pos+1] << 8) |
178 (d->config[pos+2] << 16) |
179 (d->config[pos+3] << 24);
185 compare_them(const void *A, const void *B)
187 const struct pci_dev *a = (*(const struct device **)A)->dev;
188 const struct pci_dev *b = (*(const struct device **)B)->dev;
198 if (a->func < b->func)
200 if (a->func > b->func)
208 struct device **index, **h, **last_dev;
213 for(d=first_dev; d; d=d->next)
215 h = index = alloca(sizeof(struct device *) * cnt);
216 for(d=first_dev; d; d=d->next)
218 qsort(index, cnt, sizeof(struct device *), compare_them);
219 last_dev = &first_dev;
224 last_dev = &(*h)->next;
232 #define FLAG(x,y) ((x & y) ? '+' : '-')
235 show_terse(struct device *d)
238 struct pci_dev *p = d->dev;
239 byte classbuf[128], devbuf[128];
241 printf("%02x:%02x.%x %s: %s",
245 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
247 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
248 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
249 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
250 p->vendor_id, p->device_id, 0, 0));
251 if (c = get_conf_byte(d, PCI_REVISION_ID))
252 printf(" (rev %02x)", c);
256 c = get_conf_byte(d, PCI_CLASS_PROG);
257 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
259 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
262 printf(" (prog-if %02x", c);
272 show_size(pciaddr_t x)
278 printf("%d", (int) x);
279 else if (x < 1048576)
280 printf("%dK", (int)(x / 1024));
281 else if (x < 0x80000000)
282 printf("%dM", (int)(x / 1048576));
284 printf(ADDR_FORMAT, x);
289 show_bases(struct device *d, int cnt)
291 struct pci_dev *p = d->dev;
292 word cmd = get_conf_word(d, PCI_COMMAND);
297 pciaddr_t pos = p->base_addr[i];
298 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
299 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
300 if (flg == 0xffffffff)
302 if (!pos && !flg && !len)
305 printf("\tRegion %d: ", i);
308 if (pos && !flg) /* Reported by the OS, but not by the device */
310 printf("[virtual] ");
313 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
315 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
316 printf("I/O ports at ");
318 printf(IO_FORMAT, a);
319 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
322 printf("<unassigned>");
323 if (!(cmd & PCI_COMMAND_IO))
324 printf(" [disabled]");
328 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
329 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
333 printf("Memory at ");
334 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
338 printf("<invalid-64bit-slot>");
344 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
348 printf("%08x" ADDR_FORMAT, z, a);
350 printf("<unassigned>");
358 printf(ADDR_FORMAT, a);
360 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
362 printf(" (%s, %sprefetchable)",
363 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
365 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
366 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
367 if (!(cmd & PCI_COMMAND_MEMORY))
368 printf(" [disabled]");
376 show_pm(struct device *d, int where, int cap)
379 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
381 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
384 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
385 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
386 FLAG(cap, PCI_PM_CAP_DSI),
387 FLAG(cap, PCI_PM_CAP_D1),
388 FLAG(cap, PCI_PM_CAP_D2),
389 pm_aux_current[(cap >> 6) & 7],
390 FLAG(cap, PCI_PM_CAP_PME_D0),
391 FLAG(cap, PCI_PM_CAP_PME_D1),
392 FLAG(cap, PCI_PM_CAP_PME_D2),
393 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
394 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
395 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
396 t = get_conf_word(d, where + PCI_PM_CTRL);
397 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
398 t & PCI_PM_CTRL_STATE_MASK,
399 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
400 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
401 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
402 FLAG(t, PCI_PM_CTRL_PME_STATUS));
403 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
405 printf("\t\tBridge: PM%c B3%c\n",
406 FLAG(t, PCI_PM_BPCC_ENABLE),
407 FLAG(~t, PCI_PM_PPB_B2_B3));
411 format_agp_rate(int rate, char *buf)
422 *c++ = '0' + (1 << i);
427 strcpy(buf, "<none>");
431 show_agp(struct device *d, int where, int cap)
437 printf("AGP version %x.%x\n", cap/16, cap%16);
440 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
441 t = get_conf_long(d, where + PCI_AGP_STATUS);
442 format_agp_rate(t & 7, rate);
443 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s\n",
444 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
445 FLAG(t, PCI_AGP_STATUS_SBA),
446 FLAG(t, PCI_AGP_STATUS_64BIT),
447 FLAG(t, PCI_AGP_STATUS_FW),
449 t = get_conf_long(d, where + PCI_AGP_COMMAND);
450 format_agp_rate(t & 7, rate);
451 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s\n",
452 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
453 FLAG(t, PCI_AGP_COMMAND_SBA),
454 FLAG(t, PCI_AGP_COMMAND_AGP),
455 FLAG(t, PCI_AGP_COMMAND_64BIT),
456 FLAG(t, PCI_AGP_COMMAND_FW),
461 show_rom(struct device *d)
463 struct pci_dev *p = d->dev;
464 pciaddr_t rom = p->rom_base_addr;
465 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
469 printf("\tExpansion ROM at ");
470 if (rom & PCI_ROM_ADDRESS_MASK)
471 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
473 printf("<unassigned>");
474 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
475 printf(" [disabled]");
481 show_msi(struct device *d, int where, int cap)
487 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
488 FLAG(cap, PCI_MSI_FLAGS_64BIT),
489 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
490 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
491 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
494 is64 = cap & PCI_MSI_FLAGS_64BIT;
495 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
496 printf("\t\tAddress: ");
499 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
500 w = get_conf_word(d, where + PCI_MSI_DATA_64);
504 w = get_conf_word(d, where + PCI_MSI_DATA_32);
505 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
506 printf("%08x Data: %04x\n", t, w);
512 int esr = cap & 0xff;
515 printf("Slot ID: %d slots, First%c, chassis %02x\n",
516 esr & PCI_SID_ESR_NSLOTS,
517 FLAG(esr, PCI_SID_ESR_FIC),
522 show_caps(struct device *d)
524 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
526 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
530 printf("\tCapabilities: ");
531 if (!config_fetch(d, where, 4))
533 puts("<available only to root>");
536 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
537 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
538 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
539 printf("[%02x] ", where);
542 printf("<chain broken>\n");
548 show_pm(d, where, cap);
551 show_agp(d, where, cap);
554 printf("Vital Product Data\n");
556 case PCI_CAP_ID_SLOTID:
560 show_msi(d, where, cap);
563 printf("#%02x [%04x]\n", id, cap);
571 show_htype0(struct device *d)
579 show_htype1(struct device *d)
581 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
582 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
583 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
584 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
585 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
586 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
587 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
588 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
589 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
590 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
591 int verb = verbose > 2;
594 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
595 get_conf_byte(d, PCI_PRIMARY_BUS),
596 get_conf_byte(d, PCI_SECONDARY_BUS),
597 get_conf_byte(d, PCI_SUBORDINATE_BUS),
598 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
600 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
601 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
602 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
605 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
606 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
607 if (io_type == PCI_IO_RANGE_TYPE_32)
609 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
610 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
612 if (io_base <= io_limit || verb)
613 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
616 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
618 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
621 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
622 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
623 if (mem_base <= mem_limit || verb)
624 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
627 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
628 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
629 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
632 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
633 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
634 if (pref_base <= pref_limit || verb)
636 if (pref_type == PCI_PREF_RANGE_TYPE_32)
637 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
639 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
640 get_conf_long(d, PCI_PREF_BASE_UPPER32),
642 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
647 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
648 printf("\tSecondary status: SERR\n");
653 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
654 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
655 FLAG(brc, PCI_BRIDGE_CTL_SERR),
656 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
657 FLAG(brc, PCI_BRIDGE_CTL_VGA),
658 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
659 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
660 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
666 show_htype2(struct device *d)
669 word cmd = get_conf_word(d, PCI_COMMAND);
670 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
671 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
672 int verb = verbose > 2;
675 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
676 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
677 get_conf_byte(d, PCI_CB_CARD_BUS),
678 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
679 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
683 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
684 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
685 if (limit > base || verb)
686 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
687 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
688 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
693 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
694 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
695 if (!(base & PCI_IO_RANGE_TYPE_32))
700 base &= PCI_CB_IO_RANGE_MASK;
701 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
702 if (base <= limit || verb)
703 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
704 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
707 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
708 printf("\tSecondary status: SERR\n");
710 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
711 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
712 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
713 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
714 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
715 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
716 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
717 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
718 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
720 printf("\t16-bit legacy interface ports at %04x\n", exca);
724 show_verbose(struct device *d)
726 struct pci_dev *p = d->dev;
727 word status = get_conf_word(d, PCI_STATUS);
728 word cmd = get_conf_word(d, PCI_COMMAND);
729 word class = get_conf_word(d, PCI_CLASS_DEVICE);
730 byte bist = get_conf_byte(d, PCI_BIST);
731 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
732 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
733 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
734 byte max_lat, min_gnt;
735 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
736 unsigned int irq = p->irq;
737 word subsys_v, subsys_d;
744 case PCI_HEADER_TYPE_NORMAL:
745 if (class == PCI_CLASS_BRIDGE_PCI)
746 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
747 max_lat = get_conf_byte(d, PCI_MAX_LAT);
748 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
749 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
750 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
752 case PCI_HEADER_TYPE_BRIDGE:
753 if (class != PCI_CLASS_BRIDGE_PCI)
754 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
755 irq = int_pin = min_gnt = max_lat = 0;
756 subsys_v = subsys_d = 0;
758 case PCI_HEADER_TYPE_CARDBUS:
759 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
760 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
761 min_gnt = max_lat = 0;
762 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
763 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
766 printf("\t!!! Unknown header type %02x\n", htype);
770 if (subsys_v && subsys_v != 0xffff)
771 printf("\tSubsystem: %s\n",
772 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
773 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
774 p->vendor_id, p->device_id, subsys_v, subsys_d));
778 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
779 FLAG(cmd, PCI_COMMAND_IO),
780 FLAG(cmd, PCI_COMMAND_MEMORY),
781 FLAG(cmd, PCI_COMMAND_MASTER),
782 FLAG(cmd, PCI_COMMAND_SPECIAL),
783 FLAG(cmd, PCI_COMMAND_INVALIDATE),
784 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
785 FLAG(cmd, PCI_COMMAND_PARITY),
786 FLAG(cmd, PCI_COMMAND_WAIT),
787 FLAG(cmd, PCI_COMMAND_SERR),
788 FLAG(cmd, PCI_COMMAND_FAST_BACK));
789 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
790 FLAG(status, PCI_STATUS_CAP_LIST),
791 FLAG(status, PCI_STATUS_66MHZ),
792 FLAG(status, PCI_STATUS_UDF),
793 FLAG(status, PCI_STATUS_FAST_BACK),
794 FLAG(status, PCI_STATUS_PARITY),
795 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
796 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
797 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
798 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
799 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
800 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
801 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
802 FLAG(status, PCI_STATUS_DETECTED_PARITY));
803 if (cmd & PCI_COMMAND_MASTER)
805 printf("\tLatency: %d", latency);
806 if (min_gnt || max_lat)
810 printf("%dns min", min_gnt*250);
811 if (min_gnt && max_lat)
814 printf("%dns max", max_lat*250);
818 printf(", cache line size %02x", cache_line);
822 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
823 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
828 if (cmd & PCI_COMMAND_MASTER)
829 printf("bus master, ");
830 if (cmd & PCI_COMMAND_VGA_PALETTE)
831 printf("VGA palette snoop, ");
832 if (cmd & PCI_COMMAND_WAIT)
833 printf("stepping, ");
834 if (cmd & PCI_COMMAND_FAST_BACK)
835 printf("fast Back2Back, ");
836 if (status & PCI_STATUS_66MHZ)
838 if (status & PCI_STATUS_UDF)
839 printf("user-definable features, ");
841 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
842 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
843 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
844 if (cmd & PCI_COMMAND_MASTER)
845 printf(", latency %d", latency);
847 printf(", IRQ " IRQ_FORMAT, irq);
851 if (bist & PCI_BIST_CAPABLE)
853 if (bist & PCI_BIST_START)
854 printf("\tBIST is running\n");
856 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
861 case PCI_HEADER_TYPE_NORMAL:
864 case PCI_HEADER_TYPE_BRIDGE:
867 case PCI_HEADER_TYPE_CARDBUS:
874 show_hex_dump(struct device *d)
878 for(i=0; i<d->config_cnt; i++)
882 printf(" %02x", get_conf_byte(d, i));
889 show_machine(struct device *d)
891 struct pci_dev *p = d->dev;
893 word sv_id=0, sd_id=0;
894 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
896 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
898 case PCI_HEADER_TYPE_NORMAL:
899 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
900 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
902 case PCI_HEADER_TYPE_CARDBUS:
903 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
904 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
910 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
911 printf("Class:\t%s\n",
912 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
913 printf("Vendor:\t%s\n",
914 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
915 printf("Device:\t%s\n",
916 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
917 if (sv_id && sv_id != 0xffff)
919 printf("SVendor:\t%s\n",
920 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
921 printf("SDevice:\t%s\n",
922 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
924 if (c = get_conf_byte(d, PCI_REVISION_ID))
925 printf("Rev:\t%02x\n", c);
926 if (c = get_conf_byte(d, PCI_CLASS_PROG))
927 printf("ProgIf:\t%02x\n", c);
931 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
932 printf("\"%s\" \"%s\" \"%s\"",
933 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
934 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
935 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
936 p->vendor_id, p->device_id, 0, 0),
937 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
938 p->vendor_id, p->device_id, 0, 0));
939 if (c = get_conf_byte(d, PCI_REVISION_ID))
940 printf(" -r%02x", c);
941 if (c = get_conf_byte(d, PCI_CLASS_PROG))
942 printf(" -p%02x", c);
943 if (sv_id && sv_id != 0xffff)
944 printf(" \"%s\" \"%s\"",
945 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
946 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
948 printf(" \"\" \"\"");
954 show_device(struct device *d)
956 if (machine_readable)
964 if (verbose || show_hex)
973 for(d=first_dev; d; d=d->next)
980 struct bridge *chain; /* Single-linked list of bridges */
981 struct bridge *next, *child; /* Tree of bridges */
982 struct bus *first_bus; /* List of busses connected to this bridge */
983 unsigned int primary, secondary, subordinate; /* Bus numbers */
984 struct device *br_dev;
990 struct device *first_dev, **last_dev;
993 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
996 find_bus(struct bridge *b, unsigned int n)
1000 for(bus=b->first_bus; bus; bus=bus->sibling)
1001 if (bus->number == n)
1007 new_bus(struct bridge *b, unsigned int n)
1009 struct bus *bus = xmalloc(sizeof(struct bus));
1011 bus = xmalloc(sizeof(struct bus));
1013 bus->sibling = b->first_bus;
1014 bus->first_dev = NULL;
1015 bus->last_dev = &bus->first_dev;
1021 insert_dev(struct device *d, struct bridge *b)
1023 struct pci_dev *p = d->dev;
1026 if (! (bus = find_bus(b, p->bus)))
1029 for(c=b->child; c; c=c->next)
1030 if (c->secondary <= p->bus && p->bus <= c->subordinate)
1035 bus = new_bus(b, p->bus);
1037 /* Simple insertion at the end _does_ guarantee the correct order as the
1038 * original device list was sorted by (bus, devfn) lexicographically
1039 * and all devices on the new list have the same bus number.
1042 bus->last_dev = &d->next;
1049 struct device *d, *d2;
1050 struct bridge **last_br, *b;
1052 /* Build list of bridges */
1054 last_br = &host_bridge.chain;
1055 for(d=first_dev; d; d=d->next)
1057 word class = get_conf_word(d, PCI_CLASS_DEVICE);
1058 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1059 if (class == PCI_CLASS_BRIDGE_PCI &&
1060 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
1062 b = xmalloc(sizeof(struct bridge));
1063 if (ht == PCI_HEADER_TYPE_BRIDGE)
1065 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1066 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1067 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1071 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1072 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1073 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1076 last_br = &b->chain;
1077 b->next = b->child = NULL;
1078 b->first_bus = NULL;
1084 /* Create a bridge tree */
1086 for(b=&host_bridge; b; b=b->chain)
1088 struct bridge *c, *best;
1090 for(c=&host_bridge; c; c=c->chain)
1091 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1092 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1096 b->next = best->child;
1101 /* Insert secondary bus for each bridge */
1103 for(b=&host_bridge; b; b=b->chain)
1104 if (!find_bus(b, b->secondary))
1105 new_bus(b, b->secondary);
1107 /* Create bus structs and link devices */
1109 for(d=first_dev; d;)
1112 insert_dev(d, &host_bridge);
1118 print_it(byte *line, byte *p)
1122 fputs(line, stdout);
1123 for(p=line; *p; p++)
1124 if (*p == '+' || *p == '|')
1130 static void show_tree_bridge(struct bridge *, byte *, byte *);
1133 show_tree_dev(struct device *d, byte *line, byte *p)
1135 struct pci_dev *q = d->dev;
1139 p += sprintf(p, "%02x.%x", q->dev, q->func);
1140 for(b=&host_bridge; b; b=b->chain)
1143 if (b->secondary == b->subordinate)
1144 p += sprintf(p, "-[%02x]-", b->secondary);
1146 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1147 show_tree_bridge(b, line, p);
1151 p += sprintf(p, " %s",
1152 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1153 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1154 q->vendor_id, q->device_id, 0, 0));
1159 show_tree_bus(struct bus *b, byte *line, byte *p)
1163 else if (!b->first_dev->next)
1167 show_tree_dev(b->first_dev, line, p);
1171 struct device *d = b->first_dev;
1176 show_tree_dev(d, line, p+2);
1181 show_tree_dev(d, line, p+2);
1186 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1189 if (!b->first_bus->sibling)
1191 if (b == &host_bridge)
1192 p += sprintf(p, "[%02x]-", b->first_bus->number);
1193 show_tree_bus(b->first_bus, line, p);
1197 struct bus *u = b->first_bus;
1202 k = p + sprintf(p, "+-[%02x]-", u->number);
1203 show_tree_bus(u, line, k);
1206 k = p + sprintf(p, "\\-[%02x]-", u->number);
1207 show_tree_bus(u, line, k);
1217 show_tree_bridge(&host_bridge, line, line);
1220 /* Bus mapping mode */
1223 struct bus_bridge *next;
1224 byte this, dev, func, first, last, bug;
1230 struct bus_bridge *bridges, *via;
1233 static struct bus_info *bus_info;
1236 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1238 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1239 struct pci_dev *p = d->dev;
1241 b->next = bi->bridges;
1243 b->this = get_conf_byte(d, np);
1246 b->first = get_conf_byte(d, ns);
1247 b->last = get_conf_byte(d, nl);
1248 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1249 p->bus, p->dev, p->func, b->this, b->first, b->last);
1250 if (b->this != p->bus)
1251 printf("!!! Bridge points to invalid primary bus.\n");
1252 if (b->first > b->last)
1254 printf("!!! Bridge points to invalid bus range.\n");
1263 int verbose = pacc->debugging;
1264 struct bus_info *bi = bus_info + bus;
1268 printf("Mapping bus %02x\n", bus);
1269 for(dev = 0; dev < 32; dev++)
1270 if (filter.slot < 0 || filter.slot == dev)
1273 for(func = 0; func < func_limit; func++)
1274 if (filter.func < 0 || filter.func == func)
1276 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1277 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1278 if (vendor && vendor != 0xffff)
1280 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1283 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1285 if (d = scan_device(p))
1288 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1290 case PCI_HEADER_TYPE_BRIDGE:
1291 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1293 case PCI_HEADER_TYPE_CARDBUS:
1294 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1300 printf("But it was filtered out.\n");
1308 do_map_bridges(int bus, int min, int max)
1310 struct bus_info *bi = bus_info + bus;
1311 struct bus_bridge *b;
1314 for(b=bi->bridges; b; b=b->next)
1316 if (bus_info[b->first].guestbook)
1318 else if (b->first < min || b->last > max)
1322 bus_info[b->first].via = b;
1323 do_map_bridges(b->first, b->first, b->last);
1333 printf("\nSummary of buses:\n\n");
1334 for(i=0; i<256; i++)
1335 if (bus_info[i].exists && !bus_info[i].guestbook)
1336 do_map_bridges(i, 0, 255);
1337 for(i=0; i<256; i++)
1339 struct bus_info *bi = bus_info + i;
1340 struct bus_bridge *b = bi->via;
1344 printf("%02x: ", i);
1346 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1348 printf("Primary host bus\n");
1350 printf("Secondary host bus (?)\n");
1352 for(b=bi->bridges; b; b=b->next)
1354 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1358 printf(" <overlap bug>");
1361 printf(" <crossing bug>");
1372 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1373 pacc->method == PCI_ACCESS_DUMP)
1374 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1375 else if (!check_root())
1376 die("Only root can map the bus.");
1377 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1378 bzero(bus_info, sizeof(struct bus_info) * 256);
1379 if (filter.bus >= 0)
1380 do_map_bus(filter.bus);
1384 for(bus=0; bus<256; bus++)
1393 main(int argc, char **argv)
1398 if (argc == 2 && !strcmp(argv[1], "--version"))
1400 puts("lspci version " PCIUTILS_VERSION);
1406 pci_filter_init(pacc, &filter);
1408 while ((i = getopt(argc, argv, options)) != -1)
1412 pacc->numeric_ids = 1;
1418 pacc->buscentric = 1;
1419 buscentric_view = 1;
1422 if (msg = pci_filter_parse_slot(&filter, optarg))
1426 if (msg = pci_filter_parse_id(&filter, optarg))
1436 pacc->id_file_name = optarg;
1445 if (parse_generic_option(i, pacc, optarg))
1448 fprintf(stderr, help_msg, pacc->id_file_name);