2 * $Id: pci.h,v 1.11 2002/12/26 20:24:32 mj Exp $
6 * Copyright (c) 1997--2002 Martin Mares <mj@ucw.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
22 #include <linux/types.h>
32 #include <sys/types.h>
34 typedef u_int8_t byte;
36 typedef u_int16_t word;
37 typedef u_int16_t u16;
38 typedef u_int32_t u32;
42 #include <sys/types.h>
44 typedef u_int8_t byte;
46 typedef u_int16_t word;
47 typedef u_int16_t u16;
48 typedef u_int32_t u32;
52 #include <sys/param.h>
54 typedef u_int8_t byte;
56 typedef u_int16_t word;
57 typedef u_int16_t u16;
58 typedef u_int32_t u32;
61 #ifdef HAVE_LONG_ADDRESS
62 typedef unsigned long long pciaddr_t;
64 typedef unsigned long pciaddr_t;
68 * PCI Access Structure
74 #define PCI_ACCESS_AUTO 0 /* Autodetection (params: none) */
75 #define PCI_ACCESS_PROC_BUS_PCI 1 /* Linux /proc/bus/pci (params: path) */
76 #define PCI_ACCESS_SYSCALLS 2 /* pciconfig_read() syscalls (params: none) */
77 #define PCI_ACCESS_I386_TYPE1 3 /* i386 ports, type 1 (params: none) */
78 #define PCI_ACCESS_I386_TYPE2 4 /* i386 ports, type 2 (params: none) */
79 #define PCI_ACCESS_FBSD_DEVICE 5 /* FreeBSD /dev/pci (params: path) */
80 #define PCI_ACCESS_AIX_DEVICE 6 /* /dev/pci0, /dev/bus0, etc. */
81 #define PCI_ACCESS_NBSD_LIBPCI 7
82 #define PCI_ACCESS_DUMP 8 /* Dump file (params: filename) */
83 #define PCI_ACCESS_MAX 9
86 /* Options you can change: */
87 unsigned int method; /* Access method */
88 char *method_params[PCI_ACCESS_MAX]; /* Parameters for the methods */
89 int writeable; /* Open in read/write mode */
90 int buscentric; /* Bus-centric view of the world */
91 char *id_file_name; /* Name of ID list file */
92 int numeric_ids; /* Don't resolve device IDs to names */
93 int debugging; /* Turn on debugging messages */
95 /* Functions you can override: */
96 void (*error)(char *msg, ...); /* Write error message and quit */
97 void (*warning)(char *msg, ...); /* Write a warning message */
98 void (*debug)(char *msg, ...); /* Write a debugging message */
100 struct pci_dev *devices; /* Devices found on this bus */
102 /* Fields used internally: */
103 struct pci_methods *methods;
104 char *nl_list; /* Name list cache */
105 struct nl_entry **nl_hash;
106 int fd; /* proc: fd */
107 int fd_rw; /* proc: fd opened read-write */
108 struct pci_dev *cached_dev; /* proc: device the fd is for */
109 int fd_pos; /* proc: current position */
112 /* Initialize PCI access */
113 struct pci_access *pci_alloc(void);
114 void pci_init(struct pci_access *);
115 void pci_cleanup(struct pci_access *);
117 /* Scanning of devices */
118 void pci_scan_bus(struct pci_access *acc);
119 struct pci_dev *pci_get_dev(struct pci_access *acc, int bus, int dev, int func); /* Raw access to specified device */
120 void pci_free_dev(struct pci_dev *);
127 struct pci_dev *next; /* Next device in the chain */
128 word bus; /* Higher byte can select host bridges */
129 byte dev, func; /* Device and function */
131 /* These fields are set by pci_fill_info() */
132 int known_fields; /* Set of info fields already known */
133 word vendor_id, device_id; /* Identity of the device */
134 int irq; /* IRQ number */
135 pciaddr_t base_addr[6]; /* Base addresses */
136 pciaddr_t size[6]; /* Region sizes */
137 pciaddr_t rom_base_addr; /* Expansion ROM base address */
138 pciaddr_t rom_size; /* Expansion ROM size */
140 /* Fields used internally: */
141 struct pci_access *access;
142 struct pci_methods *methods;
143 byte *cache; /* Cached information */
145 int hdrtype; /* Direct methods: header type */
146 void *aux; /* Auxillary data */
149 #define PCI_ADDR_IO_MASK (~(pciaddr_t) 0x3)
150 #define PCI_ADDR_MEM_MASK (~(pciaddr_t) 0xf)
152 byte pci_read_byte(struct pci_dev *, int pos); /* Access to configuration space */
153 word pci_read_word(struct pci_dev *, int pos);
154 u32 pci_read_long(struct pci_dev *, int pos);
155 int pci_read_block(struct pci_dev *, int pos, byte *buf, int len);
156 int pci_write_byte(struct pci_dev *, int pos, byte data);
157 int pci_write_word(struct pci_dev *, int pos, word data);
158 int pci_write_long(struct pci_dev *, int pos, u32 data);
159 int pci_write_block(struct pci_dev *, int pos, byte *buf, int len);
161 int pci_fill_info(struct pci_dev *, int flags); /* Fill in device information */
163 #define PCI_FILL_IDENT 1
164 #define PCI_FILL_IRQ 2
165 #define PCI_FILL_BASES 4
166 #define PCI_FILL_ROM_BASE 8
167 #define PCI_FILL_SIZES 16
168 #define PCI_FILL_RESCAN 0x10000
170 void pci_setup_cache(struct pci_dev *, byte *cache, int len);
177 int bus, slot, func; /* -1 = ANY */
181 void pci_filter_init(struct pci_access *, struct pci_filter *);
182 char *pci_filter_parse_slot(struct pci_filter *, char *);
183 char *pci_filter_parse_id(struct pci_filter *, char *);
184 int pci_filter_match(struct pci_filter *, struct pci_dev *);
190 char *pci_lookup_name(struct pci_access *a, char *buf, int size, int flags, u32 arg1, u32 arg2, u32 arg3, u32 arg4);
191 void pci_free_name_list(struct pci_access *a);
193 #define PCI_LOOKUP_VENDOR 1
194 #define PCI_LOOKUP_DEVICE 2
195 #define PCI_LOOKUP_CLASS 4
196 #define PCI_LOOKUP_SUBSYSTEM 8
197 #define PCI_LOOKUP_PROGIF 16
198 #define PCI_LOOKUP_NUMERIC 0x10000