2 ******************************************************************************
4 * @brief Interrupt Service Routines.
5 ******************************************************************************
7 * COPYRIGHT(c) 2018 STMicroelectronics
9 * Redistribution and use in source and binary forms, with or without modification,
10 * are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
16 * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 ******************************************************************************
33 /* Includes ------------------------------------------------------------------*/
34 #include "stm32f1xx_hal.h"
35 #include "stm32f1xx.h"
36 #include "stm32f1xx_it.h"
38 /* USER CODE BEGIN 0 */
42 /* External variables --------------------------------------------------------*/
44 /******************************************************************************/
45 /* Cortex-M3 Processor Interruption and Exception Handlers */
46 /******************************************************************************/
49 * @brief This function handles Non maskable interrupt.
51 void NMI_Handler(void)
53 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
55 /* USER CODE END NonMaskableInt_IRQn 0 */
56 /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
58 /* USER CODE END NonMaskableInt_IRQn 1 */
62 * @brief This function handles Hard fault interrupt.
64 void HardFault_Handler(void)
66 /* USER CODE BEGIN HardFault_IRQn 0 */
68 /* USER CODE END HardFault_IRQn 0 */
71 /* USER CODE BEGIN W1_HardFault_IRQn 0 */
72 /* USER CODE END W1_HardFault_IRQn 0 */
74 /* USER CODE BEGIN HardFault_IRQn 1 */
76 /* USER CODE END HardFault_IRQn 1 */
80 * @brief This function handles Memory management fault.
82 void MemManage_Handler(void)
84 /* USER CODE BEGIN MemoryManagement_IRQn 0 */
86 /* USER CODE END MemoryManagement_IRQn 0 */
89 /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
90 /* USER CODE END W1_MemoryManagement_IRQn 0 */
92 /* USER CODE BEGIN MemoryManagement_IRQn 1 */
94 /* USER CODE END MemoryManagement_IRQn 1 */
98 * @brief This function handles Prefetch fault, memory access fault.
100 void BusFault_Handler(void)
102 /* USER CODE BEGIN BusFault_IRQn 0 */
104 /* USER CODE END BusFault_IRQn 0 */
107 /* USER CODE BEGIN W1_BusFault_IRQn 0 */
108 /* USER CODE END W1_BusFault_IRQn 0 */
110 /* USER CODE BEGIN BusFault_IRQn 1 */
112 /* USER CODE END BusFault_IRQn 1 */
116 * @brief This function handles Undefined instruction or illegal state.
118 void UsageFault_Handler(void)
120 /* USER CODE BEGIN UsageFault_IRQn 0 */
122 /* USER CODE END UsageFault_IRQn 0 */
125 /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
126 /* USER CODE END W1_UsageFault_IRQn 0 */
128 /* USER CODE BEGIN UsageFault_IRQn 1 */
130 /* USER CODE END UsageFault_IRQn 1 */
134 * @brief This function handles System service call via SWI instruction.
136 void SVC_Handler(void)
138 /* USER CODE BEGIN SVCall_IRQn 0 */
140 /* USER CODE END SVCall_IRQn 0 */
141 /* USER CODE BEGIN SVCall_IRQn 1 */
143 /* USER CODE END SVCall_IRQn 1 */
147 * @brief This function handles Debug monitor.
149 void DebugMon_Handler(void)
151 /* USER CODE BEGIN DebugMonitor_IRQn 0 */
153 /* USER CODE END DebugMonitor_IRQn 0 */
154 /* USER CODE BEGIN DebugMonitor_IRQn 1 */
156 /* USER CODE END DebugMonitor_IRQn 1 */
160 * @brief This function handles Pendable request for system service.
162 void PendSV_Handler(void)
164 /* USER CODE BEGIN PendSV_IRQn 0 */
166 /* USER CODE END PendSV_IRQn 0 */
167 /* USER CODE BEGIN PendSV_IRQn 1 */
169 /* USER CODE END PendSV_IRQn 1 */
173 * @brief This function handles System tick timer.
175 void SysTick_Handler(void)
177 /* USER CODE BEGIN SysTick_IRQn 0 */
179 /* USER CODE END SysTick_IRQn 0 */
181 HAL_SYSTICK_IRQHandler();
182 /* USER CODE BEGIN SysTick_IRQn 1 */
184 /* USER CODE END SysTick_IRQn 1 */
187 /******************************************************************************/
188 /* STM32F1xx Peripheral Interrupt Handlers */
189 /* Add here the Interrupt Handlers for the used peripherals. */
190 /* For the available peripheral interrupt handler names, */
191 /* please refer to the startup file (startup_stm32f1xx.s). */
192 /******************************************************************************/
194 /* USER CODE BEGIN 1 */
196 /* USER CODE END 1 */
197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/