1 Sun Apr 19 11:14:25 1998 Martin Mares <mj@albireo.ucw.cz>
7 * lspci.c: Now able to fetch expansion ROM base from kernel device list
8 and print it if not in buscentric mode.
10 Tue Mar 31 23:11:57 1998 Martin Mares <mj@albireo.ucw.cz>
14 Sun Mar 22 15:39:08 1998 Martin Mares <mj@albireo.ucw.cz>
16 * lspci.8: Updated the documentation.
18 * lspci.c: Modified to use the new filtering mechanism (options -f and -d).
20 * filter.c: Introduced new generic device filter.
22 Thu Mar 19 17:03:48 1998 Martin Mares <mj@lomikel.karlin.mff.cuni.cz>
24 * lspci.c (grow_tree, show_tree_dev, print_it): Fixed displaying
25 of PCI-to-PCI bridges in the tree format.
27 Sun Feb 15 10:12:25 1998 Martin Mares <mj@albireo.ucw.cz>
29 * lspci.c (show_machine): Added non-verbose mode of machine-readable
32 * pci.ids: Updates from Jens Maurer.
34 * Released as version 1.02.
36 Thu Feb 12 16:53:28 1998 Martin Mares <mj@lomikel.karlin.mff.cuni.cz>
38 * lspci.c: Added a "-m" switch for dumping machine-readable
39 configuration data (requested by Bjoern Kriews <bkr@cut.de>).
41 Mon Feb 9 13:17:43 1998 Martin Mares <mj@albireo.ucw.cz>
43 * Makefile, pciutils.h: Include local pci.h instead of <linux/pci.h>
44 if available. This should avoid all problems with official kernel
45 not synchronized to newer PCI code in CVS -- standard distribution
46 of pciutils now contains pci.h from current CVS kernel, pciutils
47 in CVS contain no pci.h and use the correct kernel include.
49 * Makefile: Fixed installation path for man pages.
51 Sat Feb 7 15:15:46 1998 Martin Mares <mj@albireo.ucw.cz>
55 * lspci.8: Created a man page.
57 * Releasing as version 1.0.
59 Tue Feb 3 20:56:00 1998 Martin Mares <mj@albireo.ucw.cz>
61 * Makefile: Recognize architecture by calling uname and pass it as ARCH_xxx
62 to all the C sources. This should eliminate problems with 32-bit compilers
65 * lspci.c (show_verbose): Recognize CardBus bridge header type.
66 (show_htype2): Stub routine.
67 (scan_config): Write sensible error message if the kernel denies reading of
68 upper part of the PCI config space.